1. Field of the Invention
The invention relates to a test device and method for making a deficiency test for a circuit device and a circuit device manufacturing method using the test method and, more specifically, to a test device for use for a circuit device including a plurality of modules being substitutable in terms of function for one another.
2. Description of the Related Art
The recent semiconductor integrated circuits have marked tendencies of dimension reduction and circuit size increase, and yield reduction due to manufacturing defect is becoming increasingly serious. In order to take remedial steps against such yield reduction, the deficiency correction using a redundant circuit has become popular because there is a limitation therefore only by optimizing the manufacturing conditions. With such deficiency correction, a semiconductor chip is provided therein with a redundant circuit in advance, and the redundant circuit takes the place of any deficient portion so that the semiconductor chip is prevented from being defective in its entirety. Exemplarily with a large-capacity DRAM (Dynamic Random Access Memory) or SRAM (Static Random Access Memory), it is common to replace any defective memory cell with a redundant memory cell.
With the deficiency correction using a redundant circuit as such, there needs to specifically know what portion in the circuit device is defective. For this purpose, with the device of Patent Document 1 (Specification of Japanese Patent No. 3192220), a plurality of modules including a redundant module is each provided with a pad for test use. While the modules are each being electrically disconnected from other portions of the device, the pads for test use are made to come in contact with a probe so that a test signal is input. The response of the signal input is then checked to see whether or not the modules operate in a normal manner.